Board Support Package For Aries v3.0

Introduction

                   

 

Aries v3.0 Board

 

This board support package (BSP) supports Aries v3.0 microcontroller board based on RISC-V architecture developed by ‘Centre for Development of Advanced Computing’ (C-DAC), India.

·       This BSP is based on driver APIs developed by Vega Processor Development Team, C-DAC.

·       It uses GNU RISC-V Embedded GCC compiler tool chain for generating required binaries.

Getting Started

·       Install FTDI USB drivers on the host PC. These drivers are provided along with CASP installation files. Latest drivers can be also be downloaded from OEM web site.

·       Create model and build to generate required binary.

·       Refer below for programming and debugging support.

Usage Notes

·       This board can be powered from micro USB-C port, DC power jack (+7V to +12V) and VIN pin (+7V to +12V). See figure above.

·       ADC input voltage range is from 0 to 3.3V. However, full scale range (FSR) is from 0.002V to 4.096V.

·       This board supports only high level interrupts on GPIO pins. However, CASP supports positive edge trigger interrupts through software. As such CASP GPIO interrupts works best below 200Hz. These GPIO interrupts are supported on GPIO0 to GPIO11 pins.

·       The SPI0-SS, SPI1-SS and SPI2-SS pins mentioned under GPIOs shall only be used as chip select output during respective SPI communication. These pins shall not be used as general purposes GPIOs.

·       USB serial performance can be increased by setting the USB serial port latency timer to the minimum on the host PC.

Board Configuration

·      General Configuration

Configuration Parameter

Parameter Value

Board Title

Vega Aries v30

Tool Chain Type

Local Build

Board Preprocessor Symbol

_BUILD_BRD_VEGA_ARIESV30

Platform Preprocessor Symbol

_BUILD_PLT_RISCV_VEGA

Compiler Preprocessor Symbol

_BUILD_CMP_RISCV_GCC

C++11 Standard Support

No

File System Support

No

OpenMP/OpenCL/CUDA Support

No/No/No

Simulation Panel Support

No

 

·      Hardware Configuration

Configuration Parameter

Parameter Value

Remarks

Number of CPU cores

1

 

Dynamic Memory Support

Yes

 

Prefer Fixed/Floating Point

Floating Point

 

DI/DO Pins

GPIO0[0], GPIO1[1], GPIO2[2], GPIO3[3], GPIO4[4], GPIO5[5], GPIO6[6], GPIO7[7], GPIO8[8], GPIO9[9], GPIO10[10], GPIO11[11], GPIO12[12], GPIO13[13], GPIO14[14], GPIO15[15], GPIO16[16], GPIO17[17], GPIO18[18], GPIO19[19], GPIO20[20], GPIO21[21], GPIO22 (LD1_G)[22], GPIO23 (LD1_B)[23], GPIO24 (LD1_R)[24], GPIO25[25], GPIO26[26], GPIO27[27], GPIO28[28], GPIO29[29], GPIO30[30], GPIO31[31], SPI0-SS[32] , SPI1-SS[33] , SPI2-SS[34]

 

ADC Default Resolution

11

 

ADC Pins

A0[0x14], A1[0x15], A2[0x16], A3[0x17]

 

PWM Default Resolution

12

 

PWM Pins

PWM0[0], PWM1[1], PWM2[2], PWM3[3], PWM4[4], PWM5[5], PWM6[6], PWM7[7]

 

DAC Default Resolution

0

 

DAC Pins

-

 

UART0

Via USB Programmer Port

UART1, UART2 Pins

TX1, RX1

TX2, RX2

SPI0, SPI1 and SPI2 Pins

SCK, MOSI, MISO and SS pins of respective SPIs

Implemented through SPI0, SPI1 and SPI2 interfaces of Vega driver. Refer SPI.h from BSP directory

I2C0 and I2C1 Pins

SDA0, SCL0 (Default)

SDA1, SCL1

Implemented through I2C0 and I2C1 interfaces of Vega driver. Refer Wire.h from BSP directory.

 

Programmer

The board can be programmed to RAM as well as Flash memory. User has to select correct programmer and serial port from ‘Setup Simulation’ window to upload the binary file as shown in below figure.

Uploading program to RAM

Select Programmer0 and correct serial port to which the board is connected. Click Run button in CASP to build the model and upload the generated binary file to RAM.

Uploading program to Flash

Select Programmer1 and correct serial port to which the board is connected. Click Run button in CASP to build the model and upload the generated binary file to Flash.

 

Debugging

Debugging via USB virtual serial COM port is supported.

 

Known Issues & Limitations

-